Our project presents a method of hardware/software co-design utilizing automatic synthesis with Mathworks Simulink as a system-level design tool. The user divides a Simulink block-based algorithm into HW/SW mapping according to the computational property. For each block of the algorithm, VHDL and C codes will be generated using Simulink HDL Coder and Simulink Embedded coder, respectively. In addition we generate the communication necessary to bridge across HW/SW boundaries consisting. In this project, we use MATLAB scripts to regroup blocks according to the input specification and mapping. It then invokes Simulink synthesis for the individual blocks. Python script creates hardware components for the bus on the HW side and generate transmit interface for SW, as well as instantiate the top level communication.