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A
G. Schirner, A. Gerstlauer and R. Dömer, "Abstract, Multifaceted Modeling of Embedded Processors for System Level Design", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, 01/2007.
Y. Hwang, G. Schirner, S. Abdi and D. D. Gajski, "Accurate Timed RTOS Model for Transaction Level Modeling", Proceedings of Design Automation and Test in Europe (DATE), Dresden, Germany, 2010.
G. Schirner, A. Gerstlauer and R. Dömer, "Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, 11/2008.
S. Abdi, Y. Hwang, L. Yu, G. Schirner and D. D. Gajski, "Automatic TLM Generation for Early Validation of Multicore Systems", IEEE Design and Test of Computers, vol/lev. 28, pp. 10-19, 2011.
F
G. Schirner, A. Gerstlauer and R. Dömer, "Fast and Accurate Processor Models for efficient MPSoC Design", ACM Transactions on Design Automation of Electronic Systems (TODAES), vol/lev. 15, pp. 10:1-10:26, 02/2010.
H
S. Abdi, G. Schirner, I. Viskic, H. Cho, Y. Hwang, L. Yu and D. D. Gajski, "Hardware-dependent Software synthesis for many-core embedded systems", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, 01/2009.
G. Schirner, R. Dömer and A. Gerstlauer, "High-Level Development, Modeling and Automatic Generation of Hardware-Dependent Software", Hardware-dependent Software, Springer Netherlands, pp. 203-231, 2009.
P
A. Gerstlauer and G. Schirner, "Platform Modeling for Exploration and Synthesis", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Piscataway, NJ, USA, IEEE Press, 2010.

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