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Export 48 results:
[ Author
] Keyword Title Type Year Filters: First Letter Of Last Name is S [Clear All Filters]
"Taming the Memory Demand Complexity of Adaptive Vision Algorithms",
IESS, Foz do Iguacu, 2015.
Embedded Systems: Design, Analysis and Verification
, vol/lev. 403, Springer, 2013.
"High-Level Specifications to Cope With Design Complexity",
Asia and South Pacific Design Automation Conference (ASPDAC), Singapore, 01/2014 .
"System-Level Design Mitigating Embedded System Design Challenges",
Qualcomm , New England, Boxborough, MA, 08/2012.
"The Future of Human-in-the-Loop Cyber-Physical Systems",
IEEE Computer, vol/lev. 46, pp. 36-45, 2013.
Embedded Systems Laboratory (ESL) Research Overview
, Boston, MA, Mathworks Research Faculty Summit, 06/2014.
"Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications",
Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, 11/2008.
"Modeling, Simulation and Synthesis in an Embedded Software Design Flow for an ARM Processor",
TR 06-06, CECS, UC Irvine, 04/2006.
"System-Level Development of Embedded Software",
Asia and South Pacific Design Automation Conference (ASPDAC) , Taipei, Taiwan, 01/2010.
"Model-based HW/SW Codesign",
Mathworks, Natick, MA, 08/2011.
"Modeling, synthesis, and validation of heterogeneous biomedical embedded systems",
High-Level Design, Verification and Test (HLDVT), 2011.
"High-Level Development, Modeling and Automatic Generation of Hardware-Dependent Software",
Hardware-dependent Software, Springer Netherlands, pp. 203-231, 2009.
"System-Level Design Mitigating Embedded System Design Challenges",
Embedded Technology Conference, San Jose, Costa Rica, 02/2012.
"Improving Accuracy of Transaction Level Models in Multi-Processor System-on-Chip Design",
Embedded System Design , University of Dortmund, Germany, 12/2007.
"Quantitative Analysis of the Speed/Accuracy Trade-off in Transaction Level Modeling",
ACM Transactions on Embedded Computer Systems, vol/lev. 8, pp. 4:1-4:29, 12/2008.
"System Level Modeling of an AMBA Bus",
Electrical Engineering and Computer Science, vol/lev. MS, Irvine, CA, University of California, Irvine, 2005.
"Embedded Software Development in an System-Level Design Flow: Case Study for an ARM Processor",
Proceedings of the International Embedded Systems Symposium, Irvine, CA, 06/2007.
"Requirements and Specification for Multi-Core SW Synthesis",
Technical Report TR-08-16, CECS, UC Irvine, 12/2008.
"System-Level Design Mitigating Embedded System Design Challenges",
Worchester Polytechnic Institute, Worchester, MA, 02/03/11, 2011.
"System-Level Design and Estimation",
Analog Devices Inc, Norwood, MA, 02/13/12, 2012.
"Quantitative Analysis of Transaction Level Models for the AMBA Bus",
Proceedings of the Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, 03/2006.
"Abstract Communication Modeling: A Case Study Using the CAN Automotive Bus",
From Specification to Embedded Systems Application, Manaus, Brazil, Springer, 08/2005.
Rapid Embedded Realization of Brain Computer Interfacing Applications
, INV-14090 , 04/2014.
"Efficient Embedded System Models Using Result Oriented Modeling",
University of York, York, England, 09/2008.
"Result Oriented Modeling a Novel Technique for Fast and Accurate TLM",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol/lev. 26, pp. 1688-1699, 09/2007.
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