- Home
- Members
- Research
- Publications
- Classes
- Current Classes
- Past Classes
- EECE 7368- Fall 2015
- EECE2160 36762 - Spring 2015
- EECE2160 16726 - Fall 2014
- EECE 4534 - Spring 2014
- EECE 7368- Fall 2013
- EECE4534 - Spring 2013
- EECE 7368 - Fall 2012
- EECE 4534 - Spring 2012
- EECE 7368 - Fall 2011
- EECE 4534 - Spring 2011
- EECE 7368 - Fall 2010
- EECE 4534 - Spring 2010
- EECE 4534 - Fall 2009
- Microprocessor-based Design (Spring 2016)
- Embedded Systems Classes
- Resources
- Activities
- Nasibeh Teimouri's PhD defense
- Adorable Sophie Schirner's arrival
- Dr. Hamed Tabkhi, goodbye celebration
- Group gathering, Fall 2015
- Group Luncheons, Fall 2015
- Esl members at DAC 2015
- Group Luncheons, Spring 2015
- Group Luncheons, Winter 2015
- Group Luncheons, Fall 2014
- Graduation party on Salisbury beach state
- Group Luncheons, summer 2014
- Group outing, Summer 2014
- Semester Wrap-up, spring 2014
- Group Luncheons, 2013
- Group outing, Fall 2013
- Contact ESL
You are here
Export 107 results:
Author Keyword Title Type [ Year
] Filters: Author is Gunar Schirner [Clear All Filters]
"A Joint SW/HW Approach for Reducing Register File Vulnerability",
ACM Transactions on Architecture and Code Optimization (ACM TACO), 02/2015, In Press.
"Multi-path Model and Sensitivity Analysis for Galvanic Coupled Intra-body Communication through Layered Tissue",
IEEE Transactions on Biomedical Circuits and Systems, 05/2015, In Press.
"Revisiting Accelerator-Based CMPs: Challenges and Solutions",
Design Automation Conference (DAC), San Francisco, Design Automation Conference (DAC), 06/2015, In Press.
"Alleviating Scalability Limitation of Accelerator-based Platforms",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1-1, 2018.
"DS-DSE: Domain-Specific Design Space Exploration for Streaming Applications",
Design Automation and Test in Europe (DATE), Dresden, Germany, DATE, 03/2018.
"An Embedded Device for Brain/Body Signal Acquisition and Processing",
International Symposium on Rapid System Prototyping (RSP), Pittsburgh, PA, 2016.
Framework for Rapid Development of Embedded Human-in-the-Loop Cyber-Physical Systems
, International Conference on BioInformatics and BioEngineering, 2016.
"Guiding Power/Quality Exploration for Communication-Intense Stream Processing",
Great Lakes Symposium on VLSI (GLS-VLSI), Boston (MA), US, 05/2016.
"Hardware thread reordering to boost OpenCL throughput on FPGAs",
ICCD, Phoenix (AZ), International Conference on Computer Design, 2016.
Improving Scalability of CMPs with Dense ACCs Coverage
, Dresden, Germany, DATE, 2016.
"OpenCL-based optimizations for acceleration of object tracking on FPGAs and GPUs",
International Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), Barcelona, Spain, 03/2016.
"Bridging Architecture and Programming for Throughput-Oriented Vision Processing",
International Symposium on Field-Programmable Gate Arrays (FPGA), 02/2015.
"Conceptual Abstraction Levels (CALs) for Managing Design Complexity of Market-Oriented MPSoCs",
Elsevier Journal of Microprocessors and Microsystems, 2015.
"An Efficient Architecture Solution for Low-Power Real-Time Background Subtraction",
IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAPs), Toronto, Canada, 2015.
"Engaging Sophomores in Embedded Design using Robotics",
Workshop on Computer Architecture Education, Portland, OR, 06/2015.
Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA
, Boston, MA, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2015.
"Function-Level Processor (FLP): A Novel Processor Class for Efficient Processing of Streaming Applications",
Springer Journal of Signal Processing and Systems, 2015.
"Modeling and Analysis of SLDL-captured NoC Abstractions",
IESS, Foz do Iguacu, Brazil, 2015.
"Optimization of Energy Efficient Relay Position for Galvanic Coupled Intra-body Communication",
IEEE WCNC, 2015.
"Rapid Heterogeneous Prototyping From Simulink",
International Symposium on Quality Electronic Design (ISQED), 03/2015.
"Rapid, High-Level Performance Estimation for DSE using Calibrated Weight Tables",
IESS, Foz do Iguacu, Brazil, 2015.
"Reducing Dynamic Dispatch Overhead (DDO) of SLDL-Synthesized Embedded Software",
Asia and South Pacific Design Automation Conference (ASPDAC), Chiba/Tokyo, Japan, 2015.
"Studying Inter-Warp Divergence Aware Execution on GPUs",
Computer Architecture Letters, 2015.
"Taming the Memory Demand Complexity of Adaptive Vision Algorithms",
IESS, Foz do Iguacu, 2015.
"Towards Closing the Specification Gap by Integrating Algorithm-Level and System-Level Design",
Springer Design Automation for Embedded Systems (DAEM), 2015.
Pages
Theme by Danetsoft and Danang Probo Sayekti inspired by Maksimer