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M. Sabbagh, H. Tabkhi and G. Schirner, "Taming the Memory Demand Complexity of Adaptive Vision Algorithms", IESS, Foz do Iguacu, 2015.
S
C. Zhang, H. Tabkhi and G. Schirner, "Studying Inter-Warp Divergence Aware Execution on GPUs", Computer Architecture Letters, 2015.
R
A. Patooghy, H. Tabkhi and G. S Miremadi, "RMAP: A Reliability-Aware Application Mapping for Network-on-Chips", International Conference on Dependability (DEPEND), 07/2010.
N. Teimouri, H. Tabkhi and G. Schirner, "Revisiting Accelerator-Based CMPs: Challenges and Solutions", Design Automation Conference (DAC), San Francisco, Design Automation Conference (DAC), 06/2015, In Press.
A. Patooghy, G. S Miremadi and H. Tabkhi, "A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips", Microprocessors and Microsystems - Embedded Hardware Design, vol/lev. 35, pp. 766-778, 2011.
P
H. Tabkhi, M. Sabbagh and G. Schirner, "A Power-efficient Real-time Solution for Adaptive Vision", IET Computers & Digital Techniques, 2014.
H. Tabkhi, M. Sabbagh and G. Schirner, A Power-efficient FPGA-based Mixture-of-Gaussian (MoG) Background Subtraction for Full-HD Resolution , FCCM, 2014.
O
A. Momeni, H. Tabkhi, G. Schirner and D. R. Kaeli, "OpenCL-based optimizations for acceleration of object tracking on FPGAs and GPUs", International Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), Barcelona, Spain, 03/2016.
N
R. Bushey, H. Tabkhi and G. Schirner, "A Novel Quantitative ESL Based SOC Architecture Exploration Methodology", Analog Devices General Technical Conference (ADI GTC), April, 2013.
J
H. Tabkhi and G. Schirner, "A Joint SW/HW Approach for Reducing Register File Vulnerability", ACM Transactions on Architecture and Code Optimization (ACM TACO), 02/2015, In Press.
I
N. Teimouri, H. Tabkhi and G. Schirner, Improving Scalability of CMPs with Dense ACCs Coverage , Dresden, Germany, DATE, 2016.
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H. Tabkhi, High-Performance Power-Efficient Solutions for Embedded Vision Computing , San Francisco, DAC 2015, 2015.
H. Tabkhi, "High-Performance Power-Efficient Solutions for embedded vision", Electrical and Computer Engineering, Boston, Massachusetts, Northeastern University, 08/2014.
A. Momeni, H. Tabkhi, G. Schirner and D. Kaeli, "Hardware thread reordering to boost OpenCL throughput on FPGAs", ICCD, Phoenix (AZ), International Conference on Computer Design, 2016.
G
H. Tabkhi, M. Sabbagh and G. Schirner, Guiding Power/Quality Exploration for Communication-Intense Stream Processing , San Francisco, USA, 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 06/2014.
H. Tabkhi, M. Sabbagh and G. Schirner, "Guiding Power/Quality Exploration for Communication-Intense Stream Processing", Great Lakes Symposium on VLSI (GLS-VLSI), Boston (MA), US, 05/2016.
C. Zhang, H. Tabkhi and G. Schirner, "A GPU-based Algorithm-specific Optimization for High-performance Background Subtraction", International Conference on Parallel Processing, Minneapolis, MN, 2014.
F
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoCs", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Zurich, Switzerland, 2014.
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): A Novel Processor Class for Efficient Processing of Streaming Applications", Springer Journal of Signal Processing and Systems, 2015.
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs", IEEE Embedded Systems Letters (accepted 5/20/14), 05/2014.
R. Bushey, H. Tabkhi and G. Schirner, "Flexible Function-Level Acceleration of Embedded Vision Applications using the Pipelined Vision", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
E
A. Momeni, H. Tabkhi, Y. Ukidave, G. Schirner and D. Kaeli, Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA , Boston, MA, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2015.
A. Patooghy, H. Tabkhi and M. S.G, "An Efficient Method to Reliable Data Transmission in Network-on-Chips", 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), 09/2010.
H. Tabkhi, M. Sabbagh and G. Schirner, "An Efficient Architecture Solution for Low-Power Real-Time Background Subtraction", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAPs), Toronto, Canada, 2015.
D
J. Zhang, H. Tabkhi and G. Schirner, "DS-DSE: Domain-Specific Design Space Exploration for Streaming Applications", Design Automation and Test in Europe (DATE), Dresden, Germany, DATE, 03/2018.

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