You are here

Export 6 results:
[ Author(Asc)] Keyword Title Type Year
Filters: Author is Nasibeh Teimouri  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
T
N. Teimouri, H. Tabkhi and G. Schirner, "Revisiting Accelerator-Based CMPs: Challenges and Solutions", Design Automation Conference (DAC), San Francisco, Design Automation Conference (DAC), 06/2015, In Press.
N. Teimouri, M. Modarressi, A. Tavakkol and H. Sarbazi-Azad, "Energy-Optimized On-Chip Networks Using Reconfigurable Shortcut Paths", Architecture of Computing Systems - {ARCS} 2011 - 24th International Conference, Como, Italy, February 24-25, 2011. Proceedings, 2011.
N. Teimouri, M. Modarressi and H. Sarbazi-Azad, "Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip", 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, {PDP} 2013, Belfast, United Kingdom, February 27 - March 1, 2013, 2013.
N. Teimouri, H. Tabkhi and G. Schirner, Improving Scalability of CMPs with Dense ACCs Coverage , Dresden, Germany, DATE, 2016.
N. Teimouri, "Improving Scalability of Chip-MultiProcessors with Many HW ACCelerators", Electrical and Computer Engineering, Boston, Northeastern University, 12/2017.
N. Teimouri, H. Tabkhi and G. Schirner, "Alleviating Scalability Limitation of Accelerator-based Platforms", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1-1, 2018.

Theme by Danetsoft and Danang Probo Sayekti inspired by Maksimer