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H. Tabkhi and G. Schirner, "Application-Guided Power Gating Reducing Register File Static Power", IEEE Transactions on Very Large Scale Integration (TVLSI), 2014.
H. Tabkhi, R. Bushey and G. Schirner, "Conceptual Abstraction Levels (CALs) for Managing Design Complexity of Market-Oriented MPSoCs", Elsevier Journal of Microprocessors and Microsystems, 2015.
M. KhavariTavana, N. Teimouri, M. Abdollahi and M. Goudarzi, "Simultaneous hardware and time redundancy with online task scheduling for low energy highly reliable standby-sparing system", {ACM} Trans. Embedded Comput. Syst., vol/lev. 13, pp. 86:1–86:31, 2014.
N. Teimouri, M. Modarressi, A. Tavakkol and H. Sarbazi-Azad, "Energy-Optimized On-Chip Networks Using Reconfigurable Shortcut Paths", Architecture of Computing Systems - {ARCS} 2011 - 24th International Conference, Como, Italy, February 24-25, 2011. Proceedings, 2011.
N. Teimouri, H. Tabkhi and G. Schirner, "Revisiting Accelerator-Based CMPs: Challenges and Solutions", Design Automation Conference (DAC), San Francisco, Design Automation Conference (DAC), 06/2015, In Press.
N. Teimouri, H. Tabkhi and G. Schirner, Improving Scalability of CMPs with Dense ACCs Coverage , Dresden, Germany, DATE, 2016.
N. Teimouri, H. Tabkhi and G. Schirner, "Alleviating Scalability Limitation of Accelerator-based Platforms", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1-1, 2018.
N. Teimouri, M. Modarressi and H. Sarbazi-Azad, "Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip", 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, {PDP} 2013, Belfast, United Kingdom, February 27 - March 1, 2013, 2013.
N. Teimouri, "Improving Scalability of Chip-MultiProcessors with Many HW ACCelerators", Electrical and Computer Engineering, Boston, Northeastern University, 12/2017.
R. Ubal, D. Schaa, P. Mistry, X. Gong, Y. Ukidave, Z. Chen, G. Schirner and D. R. Kaeli, "Exploring the Heterogeneous Design Space for both Performance and Reliability", Design Automation Conference (DAC), San Francisco, CA, 2014.
Y. Ukidave, K. Ziabari, P. Mistry, G. Schirner and D. R. Kaeli, "Analyzing Power Efficiency of Optimization Techniques and Algorithm Design Methods for Applications on Heterogeneous Platforms", International Journal of High Performance Computing Applications (IJHPCA), 2014.
Y. Ukidave, A. Kavyan Ziabari, P. Mistry, G. Schirner and D. R. Kaeli, "Quantifying the energy efficiency of FFT on heterogeneous platforms", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2013.
Y. Ukidave, G. Schirner and D. R. Kaeli, "Fast Fourier Transform (FFT) on GPUs", Numerical Computations with GPUs, Springer International Publishing, pp. 339 - 361, 2014.
J. Zhang, H. Tabkhi and G. Schirner, "DS-DSE: Domain-Specific Design Space Exploration for Streaming Applications", Design Automation and Test in Europe (DATE), Dresden, Germany, DATE, 03/2018.
J. Zhang and G. Schirner, "Towards Closing the Specification Gap by Integrating Algorithm-Level and System-Level Design", Springer Design Automation for Embedded Systems (DAEM), 2015.
J. Zhang, Y. Zhang and M. L. Wang, "The Improvement of Accuracy of Standalone GPS with an Alternative Positioning Algorithm", SPIE Smart Structures and Materials+ Nondestructive Evaluation and Health Monitoring, International Society for Optics and Photonics, 2011.
J. Zhang, "Integration of Algorithm-Level Design and System-Level Design: Synthesis, Optimization and Exploration", Electrical and Computer Engineering, Boston, Massachusetts, Northeastern University, 08/2014.
J. Zhang and G. Schirner, Demand-Driven Granularity Tuning In Specification Synthesis , San Francisco, USA, 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 06/2014.
J.. Zhang, H.. Tabkhi and G.. Schirner, Mitigating Application Diversity for Allocating a Unified ACC-Rich Platform , 2019.
J. Zhang and G. Schirner, "Automatic Specification Granularity Tuning for Design Space Exploration", Proceedings of the ACM/IEEE Conference on Design, Automation & Test in Europe (DATE), Dresden, Germany, 03/2014.
J. Zhang and G. Schirner, "Joint Algorithm Developing and System-Level Design: Case Study on Video Encoding", International Embedded Systems Symposium (IESS), Paderborn, Germany , 2013.
J. Zhang, S. Tang and G. Schirner, "Reducing Dynamic Dispatch Overhead (DDO) of SLDL-Synthesized Embedded Software", Asia and South Pacific Design Automation Conference (ASPDAC), Chiba/Tokyo, Japan, 2015.
C. Zhang, H. Tabkhi and G. Schirner, "A GPU-based Algorithm-specific Optimization for High-performance Background Subtraction", International Conference on Parallel Processing, Minneapolis, MN, 2014.
C. Zhang, H. Tabkhi and G. Schirner, "Studying Inter-Warp Divergence Aware Execution on GPUs", Computer Architecture Letters, 2015.
J. Zhang, H. Qiu, S. Shahini Shamsabadi, R. Birken and G. Schirner, "WiP Abstract: System-Level Integration of Mobile Multi-Modal Multi-Sensor Systems", International Conference on Cyber-Physical Systems (ICCPS), 2014.


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