You are here

Home » Publications
Export 129 results:
Author Keyword [ Title(Desc)] Type Year
Filters: First Letter Of Last Name is S  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
M
G. Schirner, "Modeling, Synthesis, and Validation of Heterogeneous Biomedical Embedded Systems", High-Level Design, Verification and Test (HLDVT), Napa, CA, 11/2011.
M. Swaminathan, J. Sebastià Pujol and G. Schirner, "Multi-path 2-Port Channel Characterization for Galvanic Coupled Intra-body Communication", BodyNets, London UK, International Conference on Body Area Networks, 09/2014.
M. Swaminathan, J. Sebastià Pujol and G. Schirner, "Multi-path 2-Port Channel Characterization for Galvanic Coupled Intra-body Communication", BodyNets, London UK, International Conference on Body Area Networks, 09/2014.
M.. Swaminathan, F.. S. Cabrera, J.. S. Pujol, U.. Muncuk, G. Schirner and K. Chowdhury, "Multi-path Model and Sensitivity Analysis for Galvanic Coupled Intra-body Communication through Layered Tissue", IEEE Transactions on Biomedical Circuits and Systems, 05/2015, In Press.
M.. Swaminathan, F.. S. Cabrera, J.. S. Pujol, U.. Muncuk, G. Schirner and K. Chowdhury, "Multi-path Model and Sensitivity Analysis for Galvanic Coupled Intra-body Communication through Layered Tissue", IEEE Transactions on Biomedical Circuits and Systems, 05/2015, In Press.
N
A. Gerstlauer, G. Schirner, D. Shin and J. Peng, "Necessary and Sufficient Functionality and Parameters for SoC Communication", TR-06-01, 05/2006.
A. Gerstlauer, G. Schirner, D. Shin and J. Peng, "Necessary and Sufficient Functionality and Parameters for SoC Communication", TR-06-01, 05/2006.
J. Zhang and G. Schirner, "The Next Generation Transportation Infrastructure Performance Inspection: A CPS Approach", NSF Young Professionals Workshop on Cyber Physical Systems, Washington D.C, 02/2014.
R. Bushey, H. Tabkhi and G. Schirner, "A Novel Quantitative ESL Based SOC Architecture Exploration Methodology", Analog Devices General Technical Conference (ADI GTC), April, 2013.
O
A. Momeni, H. Tabkhi, G. Schirner and D. R. Kaeli, "OpenCL-based optimizations for acceleration of object tracking on FPGAs and GPUs", International Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), Barcelona, Spain, 03/2016.
M.. Swaminathan, G. Schirner and K. Chowdhury, "Optimization of Energy Efficient Relay Position for Galvanic Coupled Intra-body Communication", IEEE WCNC, 2015.
M.. Swaminathan, G. Schirner and K. Chowdhury, "Optimization of Energy Efficient Relay Position for Galvanic Coupled Intra-body Communication", IEEE WCNC, 2015.
P
A. Gerstlauer and G. Schirner, "Platform Modeling for Exploration and Synthesis", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Piscataway, NJ, USA, IEEE Press, 2010.
N. Teimouri, M. Modarressi and H. Sarbazi-Azad, "Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip", 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, {PDP} 2013, Belfast, United Kingdom, February 27 - March 1, 2013, 2013.
H. Tabkhi, M. Sabbagh and G. Schirner, A Power-efficient FPGA-based Mixture-of-Gaussian (MoG) Background Subtraction for Full-HD Resolution , FCCM, 2014.
H. Tabkhi, M. Sabbagh and G. Schirner, A Power-efficient FPGA-based Mixture-of-Gaussian (MoG) Background Subtraction for Full-HD Resolution , FCCM, 2014.
H. Tabkhi, M. Sabbagh and G. Schirner, "A Power-efficient Real-time Solution for Adaptive Vision", IET Computers & Digital Techniques, 2014.
H. Tabkhi, M. Sabbagh and G. Schirner, "A Power-efficient Real-time Solution for Adaptive Vision", IET Computers & Digital Techniques, 2014.
Q
Y. Ukidave, A. Kavyan Ziabari, P. Mistry, G. Schirner and D. R. Kaeli, "Quantifying the energy efficiency of FFT on heterogeneous platforms", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2013.
G. Schirner and R. Dömer, "Quantitative Analysis of the Speed/Accuracy Trade-off in Transaction Level Modeling", ACM Transactions on Embedded Computer Systems, vol/lev. 8, pp. 4:1-4:29, 12/2008.
G. Schirner and R. Dömer, "Quantitative Analysis of Transaction Level Models for the AMBA Bus", Proceedings of the Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, 03/2006.
R
G. Schirner, S. Feng and D. Erdogmus, Rapid Embedded Realization of Brain Computer Interfacing Applications , INV-14090 , 04/2014.
S. Feng, C. Driscoll, J. Fevold, H. Jiang and G. Schirner, "Rapid Heterogeneous Prototyping From Simulink", International Symposium on Quality Electronic Design (ISQED), 03/2015.
K. Moazzami, S. Patel and G. Schirner, "Rapid, High-Level Performance Estimation for DSE using Calibrated Weight Tables", IESS, Foz do Iguacu, Brazil, 2015.
X. Han and G. Schirner, "Real-Time MP3 Decoding on FPGA: a Case Study of System Model Features,", Technical Report TR 09-09, CECS, UC Irvine, 07/2009.

Pages

Theme by Danetsoft and Danang Probo Sayekti inspired by Maksimer