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S
G. Schirner, "Modeling, Synthesis, and Validation of Heterogeneous Biomedical Embedded Systems", High-Level Design, Verification and Test (HLDVT), Napa, CA, 11/2011.
G. Schirner, "Hardware/Software Co-Design: System Synthesis Using MATLAB and Simulink", Mathworks, Natick, MA, 04/2012.
G. Schirner, A. Gerstlauer and R. Dömer, "Fast and Accurate Processor Models for efficient MPSoC Design", ACM Transactions on Design Automation of Electronic Systems (TODAES), vol/lev. 15, pp. 10:1-10:26, 02/2010.
G. Schirner, D. D. Gajski and S. Abdi, "Requirements and Specification for Multi-Core SW Synthesis", Technical Report TR-08-16, CECS, UC Irvine, 12/2008.
G. Schirner, T. Harmon and R. Klefstad, "Late Demarshalling: A Technique for Efficient Multi-language Middleware for Embedded Systems", Proceedings of the International symposium on Distributed Objects and Applications (DOA), Larnaca, Cyprus, 10/2004.
G. Schirner, S. Feng and D. Erdogmus, Rapid Embedded Realization of Brain Computer Interfacing Applications , INV-14090 , 04/2014.
G. Schirner and R. Dömer, "Abstract Communication Modeling: A Case Study Using the CAN Automotive Bus", From Specification to Embedded Systems Application, Manaus, Brazil, Springer, 08/2005.
G. Schirner, "Efficient Embedded System Models Using Result Oriented Modeling", Offis, University of Oldenburg, Oldenburg, Germany, 09/2008.
G. Schirner, "CORBA in Telecommunication Products", half-day tutorial with Antonio Fontan, Alcatel USA (aud.: 45 system designers and SW engineers), Petaluma, CA, 04/2002.
G. Schirner and R. Dömer, "Quantitative Analysis of Transaction Level Models for the AMBA Bus", Proceedings of the Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, 03/2006.
G. Schirner, G. Sachdeva, A. Gerstlauer and R. Dömer, "Modeling, Simulation and Synthesis in an Embedded Software Design Flow for an ARM Processor", TR 06-06, CECS, UC Irvine, 04/2006.
G. Schirner, G. Sachdeva, A. Gerstlauer and R. Dömer, "Embedded Software Development in an System-Level Design Flow: Case Study for an ARM Processor", Proceedings of the International Embedded Systems Symposium, Irvine, CA, 06/2007.
G. Schirner, "System-Level Design of Human-in-the-Loop Cyber-Physical Systems", New England CPS, Natick, MA, 5/2012.
G. Schirner, "The Integration of Algorithm Development Into System Level Design", Mathworks, Natick, MA, 04/09/12, 2012.
G. Schirner, D. Erdogmus, K. Chowdhury and T. Padir, "The Future of Human-in-the-Loop Cyber-Physical Systems", IEEE Computer, vol/lev. 46, pp. 36-45, 2013.
M. Sabbagh, H. Tabkhi and G. Schirner, "Taming the Memory Demand Complexity of Adaptive Vision Algorithms", IESS, Foz do Iguacu, 2015.
R
M. Ravel, G. Schirner and D. R. Kaeli, "A Mobile Platform Approach to integrating active learing accross the EE/CE/ICT Engineering Curriculum", Proceedings of the European Workshop on Microelectronics Education, Grenoble, France, 05/2012.
Q
H. Qiu, "Managing bulk sensor data for heterogeneous distributed systems", Electrical and Computer Engineering, vol/lev. MSc, Boston, Northeastern, 04/2014.
P
A. Patooghy, G. S Miremadi and H. Tabkhi, "A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips", Microprocessors and Microsystems - Embedded Hardware Design, vol/lev. 35, pp. 766-778, 2011.
A. Patooghy, H. Tabkhi and M. S.G, "An Efficient Method to Reliable Data Transmission in Network-on-Chips", 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), 09/2010.
A. Patooghy, H. Tabkhi and G. S Miremadi, "RMAP: A Reliability-Aware Application Mapping for Network-on-Chips", International Conference on Dependability (DEPEND), 07/2010.
M
A. Momeni, H. Tabkhi, Y. Ukidave, G. Schirner and D. Kaeli, Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA , Boston, MA, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2015.
A. Momeni, F. Previlion, A. Despopoulos, G. Schirner, J. Kimani and D. Kaeli, "Engaging Sophomores in Embedded Design using Robotics", Workshop on Computer Architecture Education, Portland, OR, 06/2015.
A. Momeni, H. Tabkhi, G. Schirner and D. R. Kaeli, "OpenCL-based optimizations for acceleration of object tracking on FPGAs and GPUs", International Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), Barcelona, Spain, 03/2016.
A. Momeni, H. Tabkhi, G. Schirner and D. R. Kaeli, "Bridging Architecture and Programming for Throughput-Oriented Vision Processing", International Symposium on Field-Programmable Gate Arrays (FPGA), 02/2015.

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