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Conference Paper
S. Abdi, G. Schirner, I. Viskic, H. Cho, Y. Hwang, L. Yu and D. D. Gajski, "Hardware-dependent Software synthesis for many-core embedded systems", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, 01/2009.
Y. Hwang, G. Schirner and S. Abdi, "Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support", Analysis, Architectures and Modelling of Embedded Systems, Springer Berlin Heidelberg, 2009.
G. Schirner and R. Dömer, "Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling", In Proceedings of Design Automation and Test in Europe (DATE), Munich, Germany, 03, 2008.
G. Schirner, A. Gerstlauer and R. Dömer, "Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, 11/2008.
G. Schirner and R. Dömer, Analysis and Optimization of Fast and Accurate SoC Platform Models , San Diego, California, In SIGDA PhD Forum at the Design Automation Conference (DAC), 2007.
G. Schirner, G. Sachdeva, A. Gerstlauer and R. Dömer, "Embedded Software Development in an System-Level Design Flow: Case Study for an ARM Processor", Proceedings of the International Embedded Systems Symposium, Irvine, CA, 06/2007.
G. Schirner, A. Gerstlauer and R. Dömer, "Abstract, Multifaceted Modeling of Embedded Processors for System Level Design", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, 01/2007.
G. Schirner and R. Dömer, "Quantitative Analysis of Transaction Level Models for the AMBA Bus", Proceedings of the Design, Automation and Test in Europe (DATE) Conference, Munich, Germany, 03/2006.
G. Schirner and R. Dömer, "Fast and Accurate Transaction Level Models using Result Oriented Modeling", In Proceedings of the International Conference on Computer Aided Design (ICCAD), San Jose, CA, 11/2006.
G. Schirner and R. Dömer, "Accurate yet Fast Modeling of Real-Time Communication", Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES ISSS), Seoul, Korea, 10/2006.
G. Schirner and R. Dömer, "Abstract Communication Modeling: A Case Study Using the CAN Automotive Bus", From Specification to Embedded Systems Application, Manaus, Brazil, Springer, 08/2005.
G. Schirner, T. Harmon and R. Klefstad, "Late Demarshalling: A Technique for Efficient Multi-language Middleware for Embedded Systems", Proceedings of the International symposium on Distributed Objects and Applications (DOA), Larnaca, Cyprus, 10/2004.
Journal Article
M.. Swaminathan, F.. S. Cabrera, J.. S. Pujol, U.. Muncuk, G. Schirner and K. Chowdhury, "Multi-path Model and Sensitivity Analysis for Galvanic Coupled Intra-body Communication through Layered Tissue", IEEE Transactions on Biomedical Circuits and Systems, 05/2015, In Press.
H. Tabkhi and G. Schirner, "A Joint SW/HW Approach for Reducing Register File Vulnerability", ACM Transactions on Architecture and Code Optimization (ACM TACO), 02/2015, In Press.
N. Teimouri, H. Tabkhi and G. Schirner, "Alleviating Scalability Limitation of Accelerator-based Platforms", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1-1, 2018.
H. Tabkhi, R. Bushey and G. Schirner, "Conceptual Abstraction Levels (CALs) for Managing Design Complexity of Market-Oriented MPSoCs", Elsevier Journal of Microprocessors and Microsystems, 2015.
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): A Novel Processor Class for Efficient Processing of Streaming Applications", Springer Journal of Signal Processing and Systems, 2015.
C. Zhang, H. Tabkhi and G. Schirner, "Studying Inter-Warp Divergence Aware Execution on GPUs", Computer Architecture Letters, 2015.
J. Zhang and G. Schirner, "Towards Closing the Specification Gap by Integrating Algorithm-Level and System-Level Design", Springer Design Automation for Embedded Systems (DAEM), 2015.
H. Tabkhi and G. Schirner, "Application-Guided Power Gating Reducing Register File Static Power", IEEE Transactions on Very Large Scale Integration (TVLSI), 2014.
H. Tabkhi, M. Sabbagh and G. Schirner, "A Power-efficient Real-time Solution for Adaptive Vision", IET Computers & Digital Techniques, 2014.
Y. Ukidave, K. Ziabari, P. Mistry, G. Schirner and D. R. Kaeli, "Analyzing Power Efficiency of Optimization Techniques and Algorithm Design Methods for Applications on Heterogeneous Platforms", International Journal of High Performance Computing Applications (IJHPCA), 2014.
G. Schirner, D. Erdogmus, K. Chowdhury and T. Padir, "The Future of Human-in-the-Loop Cyber-Physical Systems", IEEE Computer, vol/lev. 46, pp. 36-45, 2013.
S. Abdi, Y. Hwang, L. Yu, G. Schirner and D. D. Gajski, "Automatic TLM Generation for Early Validation of Multicore Systems", IEEE Design and Test of Computers, vol/lev. 28, pp. 10-19, 2011.
G. Schirner, A. Gerstlauer and R. Dömer, "Fast and Accurate Processor Models for efficient MPSoC Design", ACM Transactions on Design Automation of Electronic Systems (TODAES), vol/lev. 15, pp. 10:1-10:26, 02/2010.

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