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Export 129 results:
Author Keyword Title Type [ Year
] Filters: First Letter Of Last Name is S [Clear All Filters]
"Modeling, Synthesis, and Validation of Heterogeneous Biomedical Embedded Systems",
High-Level Design, Verification and Test (HLDVT), Napa, CA, 11/2011.
"System-Level Design Mitigating Embedded System Design Challenges",
Worchester Polytechnic Institute, Worchester, MA, 02/03/11, 2011.
"AFReP: Application-guided Function-level Registerfile power-gating for embedded processors",
International Conference on Computer-Aided Design (ICCAD), 2012.
"Application-specific power-efficient approach for reducing register file vulnerability",
Design Automation and Test In Europe (DATE), 2012.
"ARRA: Application-guided reliability-enhanced registerfile architecture for embedded processors",
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2012.
"Hardware/Software Co-Design: System Synthesis Using MATLAB and Simulink",
Mathworks, Natick, MA, 04/2012.
"The Integration of Algorithm Development Into System Level Design",
Mathworks, Natick, MA, 04/09/12, 2012.
"A Mobile Platform Approach to integrating active learing accross the EE/CE/ICT Engineering Curriculum",
Proceedings of the European Workshop on Microelectronics Education, Grenoble, France, 05/2012.
"System-Level Design and Estimation",
Analog Devices Inc, Norwood, MA, 02/13/12, 2012.
"System-Level Design Mitigating Embedded System Design Challenges",
Qualcomm , New England, Boxborough, MA, 08/2012.
"System-Level Design Mitigating Embedded System Design Challenges",
Embedded Technology Conference, San Jose, Costa Rica, 02/2012.
"System-Level Design of Human-in-the-Loop Cyber-Physical Systems",
New England CPS, Natick, MA, 5/2012.
"VOTERS: Design of a Mobile Multi-Modal Multi-Sensor System",
International Workshop on Knowledge Discovery from Sensor Data, 08/2012.
"Algorithm and Architecture Co-Design of Mixture of Gaussian (MoG) Background Subtraction for Embedded Vision Processor",
Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
Embedded Systems: Design, Analysis and Verification
, vol/lev. 403, Springer, 2013.
"Flexible Function-Level Acceleration of Embedded Vision Applications using the Pipelined Vision",
Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
"The Future of Human-in-the-Loop Cyber-Physical Systems",
IEEE Computer, vol/lev. 46, pp. 36-45, 2013.
"Joint Algorithm Developing and System-Level Design: Case Study on Video Encoding",
International Embedded Systems Symposium (IESS), Paderborn, Germany , 2013.
"A Novel Quantitative ESL Based SOC Architecture Exploration Methodology",
Analog Devices General Technical Conference (ADI GTC), April, 2013.
"Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip",
21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, {PDP} 2013, Belfast, United Kingdom, February 27 - March 1, 2013, 2013.
"Quantifying the energy efficiency of FFT on heterogeneous platforms",
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2013.
"Analyzing Power Efficiency of Optimization Techniques and Algorithm Design Methods for Applications on Heterogeneous Platforms",
International Journal of High Performance Computing Applications (IJHPCA), 2014.
"Application-Guided Power Gating Reducing Register File Static Power",
IEEE Transactions on Very Large Scale Integration (TVLSI), 2014.
"Automatic Specification Granularity Tuning for Design Space Exploration",
Proceedings of the ACM/IEEE Conference on Design, Automation & Test in Europe (DATE), Dresden, Germany, 03/2014.
Demand-Driven Granularity Tuning In Specification Synthesis
, San Francisco, USA, 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 06/2014.
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