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Export 107 results:
Author Keyword Title Type [ Year
] Filters: Author is Gunar Schirner [Clear All Filters]
"Quantifying the energy efficiency of FFT on heterogeneous platforms",
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2013.
"AFReP: Application-guided Function-level Registerfile power-gating for embedded processors",
International Conference on Computer-Aided Design (ICCAD), 2012.
"Application-specific power-efficient approach for reducing register file vulnerability",
Design Automation and Test In Europe (DATE), 2012.
"ARRA: Application-guided reliability-enhanced registerfile architecture for embedded processors",
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2012.
"Hardware/Software Co-Design: System Synthesis Using MATLAB and Simulink",
Mathworks, Natick, MA, 04/2012.
"The Integration of Algorithm Development Into System Level Design",
Mathworks, Natick, MA, 04/09/12, 2012.
"A Mobile Platform Approach to integrating active learing accross the EE/CE/ICT Engineering Curriculum",
Proceedings of the European Workshop on Microelectronics Education, Grenoble, France, 05/2012.
"System-Level Design and Estimation",
Analog Devices Inc, Norwood, MA, 02/13/12, 2012.
"System-Level Design Mitigating Embedded System Design Challenges",
Qualcomm , New England, Boxborough, MA, 08/2012.
"System-Level Design Mitigating Embedded System Design Challenges",
Embedded Technology Conference, San Jose, Costa Rica, 02/2012.
"System-Level Design of Human-in-the-Loop Cyber-Physical Systems",
New England CPS, Natick, MA, 5/2012.
"VOTERS: Design of a Mobile Multi-Modal Multi-Sensor System",
International Workshop on Knowledge Discovery from Sensor Data, 08/2012.
"Automatic TLM Generation for Early Validation of Multicore Systems",
IEEE Design and Test of Computers, vol/lev. 28, pp. 10-19, 2011.
"Embedded Systems: System-level Design and Modeling",
Analog Devices Inc., Norwood, MA, 06/2011.
"Model-based HW/SW Codesign",
Mathworks, Natick, MA, 08/2011.
"Modeling, Synthesis, and Validation of Heterogeneous Biomedical Embedded Systems",
High-Level Design, Verification and Test (HLDVT), Napa, CA, 11/2011.
"Modeling, synthesis, and validation of heterogeneous biomedical embedded systems",
High-Level Design, Verification and Test (HLDVT), 2011.
"System-Level Design Mitigating Embedded System Design Challenges",
Worchester Polytechnic Institute, Worchester, MA, 02/03/11, 2011.
"Accurate Timed RTOS Model for Transaction Level Modeling",
Proceedings of Design Automation and Test in Europe (DATE), Dresden, Germany, 2010.
Exploring SW Performance Using Preemptive RTOS Models
, Fairfax, VA, Proceedings of Rapid System Prototyping Symposium, 2010.
"Fast and Accurate Processor Models for efficient MPSoC Design",
ACM Transactions on Design Automation of Electronic Systems (TODAES), vol/lev. 15, pp. 10:1-10:26, 02/2010.
"Platform Modeling for Exploration and Synthesis",
In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Piscataway, NJ, USA, IEEE Press, 2010.
"System-level development of embedded software",
In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 2010.
"System-Level Development of Embedded Software",
Asia and South Pacific Design Automation Conference (ASPDAC) , Taipei, Taiwan, 01/2010.
"Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support",
Analysis, Architectures and Modelling of Embedded Systems, Springer Berlin Heidelberg, 2009.
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