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Conference Paper
S. Feng, C. Driscoll, J. Fevold, H. Jiang and G. Schirner, "Rapid Heterogeneous Prototyping From Simulink", International Symposium on Quality Electronic Design (ISQED), 03/2015.
M. Sabbagh, H. Tabkhi and G. Schirner, "Taming the Memory Demand Complexity of Adaptive Vision Algorithms", IESS, Foz do Iguacu, 2015.
H. Tabkhi, M. Sabbagh and G. Schirner, "An Efficient Architecture Solution for Low-Power Real-Time Background Subtraction", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAPs), Toronto, Canada, 2015.
M. Swaminathan, J. Sebastià Pujol and G. Schirner, "Multi-path 2-Port Channel Characterization for Galvanic Coupled Intra-body Communication", BodyNets, London UK, International Conference on Body Area Networks, 09/2014.
R. Ubal, D. Schaa, P. Mistry, X. Gong, Y. Ukidave, Z. Chen, G. Schirner and D. R. Kaeli, "Exploring the Heterogeneous Design Space for both Performance and Reliability", Design Automation Conference (DAC), San Francisco, CA, 2014.
J. Zhang, H. Qiu, S. Shahini Shamsabadi, R. Birken and G. Schirner, "WiP Abstract: System-Level Integration of Mobile Multi-Modal Multi-Sensor Systems", International Conference on Cyber-Physical Systems (ICCPS), 2014.
J. Zhang and G. Schirner, "Automatic Specification Granularity Tuning for Design Space Exploration", Proceedings of the ACM/IEEE Conference on Design, Automation & Test in Europe (DATE), Dresden, Germany, 03/2014.
J. Zhang, H. Qiu, S. Shamsabadi Shamsabadi, R. Birken and G. Schirner, "SIROM - A Scalable Intelligent ROaming Multi-Modal Multi-Sensor Framework", Computer Software and Applications Conference (COMPSAC), 2014.
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoCs", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Zurich, Switzerland, 2014.
C. Zhang, H. Tabkhi and G. Schirner, "A GPU-based Algorithm-specific Optimization for High-performance Background Subtraction", International Conference on Parallel Processing, Minneapolis, MN, 2014.
R. Bushey, H. Tabkhi and G. Schirner, "Flexible Function-Level Acceleration of Embedded Vision Applications using the Pipelined Vision", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
J. Zhang and G. Schirner, "Joint Algorithm Developing and System-Level Design: Case Study on Video Encoding", International Embedded Systems Symposium (IESS), Paderborn, Germany , 2013.
H. Tabkhi, R. Bushey and G. Schirner, "Algorithm and Architecture Co-Design of Mixture of Gaussian (MoG) Background Subtraction for Embedded Vision Processor", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
Y. Ukidave, A. Kavyan Ziabari, P. Mistry, G. Schirner and D. R. Kaeli, "Quantifying the energy efficiency of FFT on heterogeneous platforms", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2013.
R. Bushey, H. Tabkhi and G. Schirner, "A Novel Quantitative ESL Based SOC Architecture Exploration Methodology", Analog Devices General Technical Conference (ADI GTC), April, 2013.
H. Tabkhi and G. Schirner, "ARRA: Application-guided reliability-enhanced registerfile architecture for embedded processors", IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2012.
M. Ravel, G. Schirner and D. R. Kaeli, "A Mobile Platform Approach to integrating active learing accross the EE/CE/ICT Engineering Curriculum", Proceedings of the European Workshop on Microelectronics Education, Grenoble, France, 05/2012.
H. Tabkhi and G. Schirner, "AFReP: Application-guided Function-level Registerfile power-gating for embedded processors", International Conference on Computer-Aided Design (ICCAD), 2012.
H. Tabkhi and G. Schirner, "Application-specific power-efficient approach for reducing register file vulnerability", Design Automation and Test In Europe (DATE), 2012.
R. Birken, G. Schirner and M. Wang, "VOTERS: Design of a Mobile Multi-Modal Multi-Sensor System", International Workshop on Knowledge Discovery from Sensor Data, 08/2012.
G. Schirner, "Modeling, synthesis, and validation of heterogeneous biomedical embedded systems", High-Level Design, Verification and Test (HLDVT), 2011.
A. Gerstlauer and G. Schirner, "Platform Modeling for Exploration and Synthesis", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Piscataway, NJ, USA, IEEE Press, 2010.
Y. Hwang, G. Schirner, S. Abdi and D. D. Gajski, "Accurate Timed RTOS Model for Transaction Level Modeling", Proceedings of Design Automation and Test in Europe (DATE), Dresden, Germany, 2010.
G. Schirner, A. Gerstlauer and R. Dömer, "System-level development of embedded software", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 2010.
G. Schirner, Exploring SW Performance Using Preemptive RTOS Models , Fairfax, VA, Proceedings of Rapid System Prototyping Symposium, 2010.

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