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Conference Paper
R. Bushey, H. Tabkhi and G. Schirner, "A Novel Quantitative ESL Based SOC Architecture Exploration Methodology", Analog Devices General Technical Conference (ADI GTC), April, 2013.
N. Teimouri, M. Modarressi and H. Sarbazi-Azad, "Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip", 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, {PDP} 2013, Belfast, United Kingdom, February 27 - March 1, 2013, 2013.
R. Bushey, H. Tabkhi and G. Schirner, "Flexible Function-Level Acceleration of Embedded Vision Applications using the Pipelined Vision", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
H. Tabkhi and G. Schirner, "ARRA: Application-guided reliability-enhanced registerfile architecture for embedded processors", IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2012.
H. Tabkhi and G. Schirner, "AFReP: Application-guided Function-level Registerfile power-gating for embedded processors", International Conference on Computer-Aided Design (ICCAD), 2012.
M. Ravel, G. Schirner and D. R. Kaeli, "A Mobile Platform Approach to integrating active learing accross the EE/CE/ICT Engineering Curriculum", Proceedings of the European Workshop on Microelectronics Education, Grenoble, France, 05/2012.
H. Tabkhi and G. Schirner, "Application-specific power-efficient approach for reducing register file vulnerability", Design Automation and Test In Europe (DATE), 2012.
R. Birken, G. Schirner and M. Wang, "VOTERS: Design of a Mobile Multi-Modal Multi-Sensor System", International Workshop on Knowledge Discovery from Sensor Data, 08/2012.
N. Teimouri, M. Modarressi, A. Tavakkol and H. Sarbazi-Azad, "Energy-Optimized On-Chip Networks Using Reconfigurable Shortcut Paths", Architecture of Computing Systems - {ARCS} 2011 - 24th International Conference, Como, Italy, February 24-25, 2011. Proceedings, 2011.
J. Zhang, Y. Zhang and M. L. Wang, "The Improvement of Accuracy of Standalone GPS with an Alternative Positioning Algorithm", SPIE Smart Structures and Materials+ Nondestructive Evaluation and Health Monitoring, International Society for Optics and Photonics, 2011.
G. Schirner, "Modeling, synthesis, and validation of heterogeneous biomedical embedded systems", High-Level Design, Verification and Test (HLDVT), 2011.
A. Gerstlauer and G. Schirner, "Platform Modeling for Exploration and Synthesis", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Piscataway, NJ, USA, IEEE Press, 2010.
Y. Hwang, G. Schirner, S. Abdi and D. D. Gajski, "Accurate Timed RTOS Model for Transaction Level Modeling", Proceedings of Design Automation and Test in Europe (DATE), Dresden, Germany, 2010.
A. Patooghy, H. Tabkhi and G. S Miremadi, "RMAP: A Reliability-Aware Application Mapping for Network-on-Chips", International Conference on Dependability (DEPEND), 07/2010.
G. Schirner, A. Gerstlauer and R. Dömer, "System-level development of embedded software", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 2010.
G. Schirner, Exploring SW Performance Using Preemptive RTOS Models , Fairfax, VA, Proceedings of Rapid System Prototyping Symposium, 2010.
A. Patooghy, H. Tabkhi and M. S.G, "An Efficient Method to Reliable Data Transmission in Network-on-Chips", 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), 09/2010.
S. Abdi, G. Schirner, I. Viskic, H. Cho, Y. Hwang, L. Yu and D. D. Gajski, "Hardware-dependent Software synthesis for many-core embedded systems", In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, 01/2009.
Y. Hwang, G. Schirner and S. Abdi, "Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support", Analysis, Architectures and Modelling of Embedded Systems, Springer Berlin Heidelberg, 2009.
H. Ghasemzadeh-Mohammadi, H. Tabkhi, G. S Miremadi and A. Ejlali, "A cost-effective error detection and roll-back recovery technique for embedded microprocessor control logic", ICM International Conference on Microelectronics, 12/2008.
G. Schirner and R. Dömer, "Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling", In Proceedings of Design Automation and Test in Europe (DATE), Munich, Germany, 03, 2008.
G. Schirner, A. Gerstlauer and R. Dömer, "Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, 11/2008.
H. Tabkhi, G. S Miremadi and E. A, "An Asymmetric Checkpointing and Rollback Error Recovery Scheme for Embedded Processors", IEEE International Symposium on Defect and Fault Tolerance of VLSI Systems, 10/2008.
G. Schirner, G. Sachdeva, A. Gerstlauer and R. Dömer, "Embedded Software Development in an System-Level Design Flow: Case Study for an ARM Processor", Proceedings of the International Embedded Systems Symposium, Irvine, CA, 06/2007.
G. Schirner, A. Gerstlauer and R. Dömer, "Abstract, Multifaceted Modeling of Embedded Processors for System Level Design", Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, 01/2007.

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