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Author Keyword Title Type [ Year(Asc)]
2015
C. Zhang, H. Tabkhi and G. Schirner, "Studying Inter-Warp Divergence Aware Execution on GPUs", Computer Architecture Letters, 2015.
M. Sabbagh, H. Tabkhi and G. Schirner, "Taming the Memory Demand Complexity of Adaptive Vision Algorithms", IESS, Foz do Iguacu, 2015.
J. Zhang and G. Schirner, "Towards Closing the Specification Gap by Integrating Algorithm-Level and System-Level Design", Springer Design Automation for Embedded Systems (DAEM), 2015.
2014
Y. Ukidave, K. Ziabari, P. Mistry, G. Schirner and D. R. Kaeli, "Analyzing Power Efficiency of Optimization Techniques and Algorithm Design Methods for Applications on Heterogeneous Platforms", International Journal of High Performance Computing Applications (IJHPCA), 2014.
H. Tabkhi and G. Schirner, "Application-Guided Power Gating Reducing Register File Static Power", IEEE Transactions on Very Large Scale Integration (TVLSI), 2014.
J. Zhang and G. Schirner, "Automatic Specification Granularity Tuning for Design Space Exploration", Proceedings of the ACM/IEEE Conference on Design, Automation & Test in Europe (DATE), Dresden, Germany, 03/2014.
K. Moazzami, "Calibrative Source-level Multi-target Performance Estimation", Electrical and Computer Engineering, Boston, Massachusetts, Northeastern University, 08/2014.
J. Zhang and G. Schirner, Demand-Driven Granularity Tuning In Specification Synthesis , San Francisco, USA, 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 06/2014.
G. Schirner, Embedded Systems Laboratory (ESL) Research Overview , Boston, MA, Mathworks Research Faculty Summit, 06/2014.
R. Ubal, D. Schaa, P. Mistry, X. Gong, Y. Ukidave, Z. Chen, G. Schirner and D. R. Kaeli, "Exploring the Heterogeneous Design Space for both Performance and Reliability", Design Automation Conference (DAC), San Francisco, CA, 2014.
Y. Ukidave, G. Schirner and D. R. Kaeli, "Fast Fourier Transform (FFT) on GPUs", Numerical Computations with GPUs, Springer International Publishing, pp. 339 - 361, 2014.
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs", IEEE Embedded Systems Letters (accepted 5/20/14), 05/2014.
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoCs", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Zurich, Switzerland, 2014.
C. Zhang, H. Tabkhi and G. Schirner, "A GPU-based Algorithm-specific Optimization for High-performance Background Subtraction", International Conference on Parallel Processing, Minneapolis, MN, 2014.
H. Tabkhi, M. Sabbagh and G. Schirner, Guiding Power/Quality Exploration for Communication-Intense Stream Processing , San Francisco, USA, 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 06/2014.
G. Schirner, "High-Level Specifications to Cope With Design Complexity", Asia and South Pacific Design Automation Conference (ASPDAC), Singapore, 01/2014 .
H. Tabkhi, "High-Performance Power-Efficient Solutions for embedded vision", Electrical and Computer Engineering, Boston, Massachusetts, Northeastern University, 08/2014.
J. Zhang, "Integration of Algorithm-Level Design and System-Level Design: Synthesis, Optimization and Exploration", Electrical and Computer Engineering, Boston, Massachusetts, Northeastern University, 08/2014.
H. Qiu, "Managing bulk sensor data for heterogeneous distributed systems", Electrical and Computer Engineering, vol/lev. MSc, Boston, Northeastern, 04/2014.
M. Swaminathan, J. Sebastià Pujol and G. Schirner, "Multi-path 2-Port Channel Characterization for Galvanic Coupled Intra-body Communication", BodyNets, London UK, International Conference on Body Area Networks, 09/2014.
J. Zhang and G. Schirner, "The Next Generation Transportation Infrastructure Performance Inspection: A CPS Approach", NSF Young Professionals Workshop on Cyber Physical Systems, Washington D.C, 02/2014.
H. Tabkhi, M. Sabbagh and G. Schirner, A Power-efficient FPGA-based Mixture-of-Gaussian (MoG) Background Subtraction for Full-HD Resolution , FCCM, 2014.
H. Tabkhi, M. Sabbagh and G. Schirner, "A Power-efficient Real-time Solution for Adaptive Vision", IET Computers & Digital Techniques, 2014.
G. Schirner, S. Feng and D. Erdogmus, Rapid Embedded Realization of Brain Computer Interfacing Applications , INV-14090 , 04/2014.
M. KhavariTavana, N. Teimouri, M. Abdollahi and M. Goudarzi, "Simultaneous hardware and time redundancy with online task scheduling for low energy highly reliable standby-sparing system", {ACM} Trans. Embedded Comput. Syst., vol/lev. 13, pp. 86:1–86:31, 2014.

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