R. Kangralkar,
"Enhancing a System-Level Design Flow by RTOS Integration",
Electrical and Computer Engineering, vol/lev. Master of Science, Boston, Massachusetts, Northeastern University, pp. 93, 07/2012.

G. Schirner,
Exploring SW Performance Using Preemptive RTOS Models
, Fairfax, VA, Proceedings of Rapid System Prototyping Symposium, 2010.

A. Momeni, H. Tabkhi, Y. Ukidave, G. Schirner and D. Kaeli,
Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA
, Boston, MA, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2015.

R. Ubal, D. Schaa, P. Mistry, X. Gong, Y. Ukidave, Z. Chen, G. Schirner and D. R. Kaeli,
"Exploring the Heterogeneous Design Space for both Performance and Reliability",
Design Automation Conference (DAC), San Francisco, CA, 2014.
