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M
K. Moazzami, S. Patel and G. Schirner, "Rapid, High-Level Performance Estimation for DSE using Calibrated Weight Tables", IESS, Foz do Iguacu, Brazil, 2015.
A. Momeni, H. Tabkhi, Y. Ukidave, G. Schirner and D. Kaeli, Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA , Boston, MA, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2015.
A. Momeni, F. Previlion, A. Despopoulos, G. Schirner, J. Kimani and D. Kaeli, "Engaging Sophomores in Embedded Design using Robotics", Workshop on Computer Architecture Education, Portland, OR, 06/2015.
A. Momeni, H. Tabkhi, G. Schirner and D. R. Kaeli, "OpenCL-based optimizations for acceleration of object tracking on FPGAs and GPUs", International Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), Barcelona, Spain, 03/2016.
A. Momeni, H. Tabkhi, G. Schirner and D. R. Kaeli, "Bridging Architecture and Programming for Throughput-Oriented Vision Processing", International Symposium on Field-Programmable Gate Arrays (FPGA), 02/2015.
A. Momeni, H. Tabkhi, G. Schirner and D. Kaeli, "Hardware thread reordering to boost OpenCL throughput on FPGAs", ICCD, Phoenix (AZ), International Conference on Computer Design, 2016.
P
A. Patooghy, H. Tabkhi and M. S.G, "An Efficient Method to Reliable Data Transmission in Network-on-Chips", 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), 09/2010.
A. Patooghy, H. Tabkhi and G. S Miremadi, "RMAP: A Reliability-Aware Application Mapping for Network-on-Chips", International Conference on Dependability (DEPEND), 07/2010.
A. Patooghy, G. S Miremadi and H. Tabkhi, "A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips", Microprocessors and Microsystems - Embedded Hardware Design, vol/lev. 35, pp. 766-778, 2011.
Q
H. Qiu, "Managing bulk sensor data for heterogeneous distributed systems", Electrical and Computer Engineering, vol/lev. MSc, Boston, Northeastern, 04/2014.
R
M. Ravel, G. Schirner and D. R. Kaeli, "A Mobile Platform Approach to integrating active learing accross the EE/CE/ICT Engineering Curriculum", Proceedings of the European Workshop on Microelectronics Education, Grenoble, France, 05/2012.
S
M. Sabbagh, H. Tabkhi and G. Schirner, "Taming the Memory Demand Complexity of Adaptive Vision Algorithms", IESS, Foz do Iguacu, 2015.
G. Schirner, M. Götz, A. Rettberg, M. Zanella and F. J. Rammig, Embedded Systems: Design, Analysis and Verification , vol/lev. 403, Springer, 2013.
G. Schirner, "High-Level Specifications to Cope With Design Complexity", Asia and South Pacific Design Automation Conference (ASPDAC), Singapore, 01/2014 .
G. Schirner, "System-Level Design Mitigating Embedded System Design Challenges", Qualcomm , New England, Boxborough, MA, 08/2012.
G. Schirner and R. Dömer, "Quantitative Analysis of the Speed/Accuracy Trade-off in Transaction Level Modeling", ACM Transactions on Embedded Computer Systems, vol/lev. 8, pp. 4:1-4:29, 12/2008.
G. Schirner, "System Level Modeling of an AMBA Bus", Electrical Engineering and Computer Science, vol/lev. MS, Irvine, CA, University of California, Irvine, 2005.
G. Schirner, "Modeling, synthesis, and validation of heterogeneous biomedical embedded systems", High-Level Design, Verification and Test (HLDVT), 2011.
G. Schirner and R. Dömer, Analysis and Optimization of Fast and Accurate SoC Platform Models , San Diego, California, In SIGDA PhD Forum at the Design Automation Conference (DAC), 2007.
G. Schirner and R. Dömer, "Accurate yet Fast Modeling of Real-Time Communication", Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES ISSS), Seoul, Korea, 10/2006.
G. Schirner and R. Dömer, "System Level Modeling of an AMBA Bus", TR-05-03, 04/2005.
G. Schirner, "System-Level Development of Embedded Software", Asia and South Pacific Design Automation Conference (ASPDAC) , Taipei, Taiwan, 01/2010.
G. Schirner, "Model-based HW/SW Codesign", Mathworks, Natick, MA, 08/2011.
G. Schirner, Embedded Systems Laboratory (ESL) Research Overview , Boston, MA, Mathworks Research Faculty Summit, 06/2014.
G. Schirner, "System-Level Design Mitigating Embedded System Design Challenges", Embedded Technology Conference, San Jose, Costa Rica, 02/2012.

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