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Conference Paper
N. Teimouri, H. Tabkhi and G. Schirner, "Revisiting Accelerator-Based CMPs: Challenges and Solutions", Design Automation Conference (DAC), San Francisco, Design Automation Conference (DAC), 06/2015, In Press.
A. Momeni, H. Tabkhi, G. Schirner and D. R. Kaeli, "OpenCL-based optimizations for acceleration of object tracking on FPGAs and GPUs", International Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), Barcelona, Spain, 03/2016.
H. Tabkhi, M. Sabbagh and G. Schirner, "Guiding Power/Quality Exploration for Communication-Intense Stream Processing", Great Lakes Symposium on VLSI (GLS-VLSI), Boston (MA), US, 05/2016.
N. Teimouri, H. Tabkhi and G. Schirner, Improving Scalability of CMPs with Dense ACCs Coverage , Dresden, Germany, DATE, 2016.
J. Zhang, S. Tang and G. Schirner, "Reducing Dynamic Dispatch Overhead (DDO) of SLDL-Synthesized Embedded Software", Asia and South Pacific Design Automation Conference (ASPDAC), Chiba/Tokyo, Japan, 2015.
S. Feng, C. Driscoll, J. Fevold, H. Jiang and G. Schirner, "Rapid Heterogeneous Prototyping From Simulink", International Symposium on Quality Electronic Design (ISQED), 03/2015.
A. Momeni, H. Tabkhi, Y. Ukidave, G. Schirner and D. Kaeli, Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA , Boston, MA, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2015.
M.. Swaminathan, G. Schirner and K. Chowdhury, "Optimization of Energy Efficient Relay Position for Galvanic Coupled Intra-body Communication", IEEE WCNC, 2015.
H. Tabkhi, M. Sabbagh and G. Schirner, "An Efficient Architecture Solution for Low-Power Real-Time Background Subtraction", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAPs), Toronto, Canada, 2015.
A. Momeni, F. Previlion, A. Despopoulos, G. Schirner, J. Kimani and D. Kaeli, "Engaging Sophomores in Embedded Design using Robotics", Workshop on Computer Architecture Education, Portland, OR, 06/2015.
R. hao, N. Teimouri, K. Moazzami and G. Schirner, "Modeling and Analysis of SLDL-captured NoC Abstractions", IESS, Foz do Iguacu, Brazil, 2015.
K. Moazzami, S. Patel and G. Schirner, "Rapid, High-Level Performance Estimation for DSE using Calibrated Weight Tables", IESS, Foz do Iguacu, Brazil, 2015.
M. Sabbagh, H. Tabkhi and G. Schirner, "Taming the Memory Demand Complexity of Adaptive Vision Algorithms", IESS, Foz do Iguacu, 2015.
M. Swaminathan, J. Sebastià Pujol and G. Schirner, "Multi-path 2-Port Channel Characterization for Galvanic Coupled Intra-body Communication", BodyNets, London UK, International Conference on Body Area Networks, 09/2014.
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoCs", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Zurich, Switzerland, 2014.
R. Ubal, D. Schaa, P. Mistry, X. Gong, Y. Ukidave, Z. Chen, G. Schirner and D. R. Kaeli, "Exploring the Heterogeneous Design Space for both Performance and Reliability", Design Automation Conference (DAC), San Francisco, CA, 2014.
C. Zhang, H. Tabkhi and G. Schirner, "A GPU-based Algorithm-specific Optimization for High-performance Background Subtraction", International Conference on Parallel Processing, Minneapolis, MN, 2014.
J. Zhang, H. Qiu, S. Shamsabadi Shamsabadi, R. Birken and G. Schirner, "SIROM - A Scalable Intelligent ROaming Multi-Modal Multi-Sensor Framework", Computer Software and Applications Conference (COMPSAC), 2014.
J. Zhang, H. Qiu, S. Shahini Shamsabadi, R. Birken and G. Schirner, "WiP Abstract: System-Level Integration of Mobile Multi-Modal Multi-Sensor Systems", International Conference on Cyber-Physical Systems (ICCPS), 2014.
J. Zhang and G. Schirner, "Automatic Specification Granularity Tuning for Design Space Exploration", Proceedings of the ACM/IEEE Conference on Design, Automation & Test in Europe (DATE), Dresden, Germany, 03/2014.
J. Zhang and G. Schirner, "Joint Algorithm Developing and System-Level Design: Case Study on Video Encoding", International Embedded Systems Symposium (IESS), Paderborn, Germany , 2013.
N. Teimouri, M. Modarressi and H. Sarbazi-Azad, "Power and Performance Efficient Partial Circuits in Packet-Switched Networks-on-Chip", 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, {PDP} 2013, Belfast, United Kingdom, February 27 - March 1, 2013, 2013.
R. Bushey, H. Tabkhi and G. Schirner, "A Novel Quantitative ESL Based SOC Architecture Exploration Methodology", Analog Devices General Technical Conference (ADI GTC), April, 2013.
H. Tabkhi, R. Bushey and G. Schirner, "Algorithm and Architecture Co-Design of Mixture of Gaussian (MoG) Background Subtraction for Embedded Vision Processor", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
R. Bushey, H. Tabkhi and G. Schirner, "Flexible Function-Level Acceleration of Embedded Vision Applications using the Pipelined Vision", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.

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