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Filters: Type is Conference Paper and Author is Hamed Tabkhi  [Clear All Filters]
In Press
N. Teimouri, H. Tabkhi and G. Schirner, "Revisiting Accelerator-Based CMPs: Challenges and Solutions", Design Automation Conference (DAC), San Francisco, Design Automation Conference (DAC), 06/2015, In Press.
2018
J. Zhang, H. Tabkhi and G. Schirner, "DS-DSE: Domain-Specific Design Space Exploration for Streaming Applications", Design Automation and Test in Europe (DATE), Dresden, Germany, DATE, 03/2018.
2016
H. Tabkhi, M. Sabbagh and G. Schirner, "Guiding Power/Quality Exploration for Communication-Intense Stream Processing", Great Lakes Symposium on VLSI (GLS-VLSI), Boston (MA), US, 05/2016.
A. Momeni, H. Tabkhi, G. Schirner and D. Kaeli, "Hardware thread reordering to boost OpenCL throughput on FPGAs", ICCD, Phoenix (AZ), International Conference on Computer Design, 2016.
N. Teimouri, H. Tabkhi and G. Schirner, Improving Scalability of CMPs with Dense ACCs Coverage , Dresden, Germany, DATE, 2016.
A. Momeni, H. Tabkhi, G. Schirner and D. R. Kaeli, "OpenCL-based optimizations for acceleration of object tracking on FPGAs and GPUs", International Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV), Barcelona, Spain, 03/2016.
2015
H. Tabkhi, M. Sabbagh and G. Schirner, "An Efficient Architecture Solution for Low-Power Real-Time Background Subtraction", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAPs), Toronto, Canada, 2015.
A. Momeni, H. Tabkhi, Y. Ukidave, G. Schirner and D. Kaeli, Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA , Boston, MA, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2015.
M. Sabbagh, H. Tabkhi and G. Schirner, "Taming the Memory Demand Complexity of Adaptive Vision Algorithms", IESS, Foz do Iguacu, 2015.
2014
H. Tabkhi, R. Bushey and G. Schirner, "Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoCs", IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Zurich, Switzerland, 2014.
C. Zhang, H. Tabkhi and G. Schirner, "A GPU-based Algorithm-specific Optimization for High-performance Background Subtraction", International Conference on Parallel Processing, Minneapolis, MN, 2014.
2013
H. Tabkhi, R. Bushey and G. Schirner, "Algorithm and Architecture Co-Design of Mixture of Gaussian (MoG) Background Subtraction for Embedded Vision Processor", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
R. Bushey, H. Tabkhi and G. Schirner, "Flexible Function-Level Acceleration of Embedded Vision Applications using the Pipelined Vision", Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC), 11/2013.
R. Bushey, H. Tabkhi and G. Schirner, "A Novel Quantitative ESL Based SOC Architecture Exploration Methodology", Analog Devices General Technical Conference (ADI GTC), April, 2013.
2010
A. Patooghy, H. Tabkhi and M. S.G, "An Efficient Method to Reliable Data Transmission in Network-on-Chips", 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD), 09/2010.
A. Patooghy, H. Tabkhi and G. S Miremadi, "RMAP: A Reliability-Aware Application Mapping for Network-on-Chips", International Conference on Dependability (DEPEND), 07/2010.

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