"Revisiting Accelerator-Based CMPs: Challenges and Solutions",
Design Automation Conference (DAC)
, San Francisco, Design Automation Conference (DAC), 06/2015, In Press.
"Hardware thread reordering to boost OpenCL throughput on FPGAs",
, Phoenix (AZ), International Conference on Computer Design, 2016.
"An Embedded Device for Brain/Body Signal Acquisition and Processing",
International Symposium on Rapid System Prototyping (RSP)
, Pittsburgh, PA, 2016.
"OpenCL-based optimizations for acceleration of object tracking on FPGAs and GPUs",
International Workshop on Architectures and Systems for Real-time Mobile Vision Applications (ASR-MOV)
, Barcelona, Spain, 03/2016.
Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA
, Boston, MA, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), 2015.
"Rapid Heterogeneous Prototyping From Simulink",
International Symposium on Quality Electronic Design (ISQED)
"Reducing Dynamic Dispatch Overhead (DDO) of SLDL-Synthesized Embedded Software",
Asia and South Pacific Design Automation Conference (ASPDAC)
, Chiba/Tokyo, Japan, 2015.
"An Efficient Architecture Solution for Low-Power Real-Time Background Subtraction",
IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAPs)
, Toronto, Canada, 2015.
"Engaging Sophomores in Embedded Design using Robotics",
Workshop on Computer Architecture Education
, Portland, OR, 06/2015.
"Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoCs",
IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)
, Zurich, Switzerland, 2014.
"Automatic Specification Granularity Tuning for Design Space Exploration",
Proceedings of the ACM/IEEE Conference on Design, Automation & Test in Europe (DATE)
, Dresden, Germany, 03/2014.