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S. Feng, C. Driscoll, J. Fevold, H. Jiang and G. Schirner, "Rapid Heterogeneous Prototyping From Simulink", International Symposium on Quality Electronic Design (ISQED), 03/2015.
A. Patooghy, G. S Miremadi and H. Tabkhi, "A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips", Microprocessors and Microsystems - Embedded Hardware Design, vol/lev. 35, pp. 766-778, 2011.
A. Patooghy, H. Tabkhi and G. S Miremadi, "RMAP: A Reliability-Aware Application Mapping for Network-on-Chips", International Conference on Dependability (DEPEND), 07/2010.
G. Schirner, S. Feng and D. Erdogmus, Rapid Embedded Realization of Brain Computer Interfacing Applications , INV-14090 , 04/2014.
G. Schirner and R. Dömer, "Result Oriented Modeling a Novel Technique for Fast and Accurate TLM", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol/lev. 26, pp. 1688-1699, 09/2007.
G. Schirner, D. D. Gajski and S. Abdi, "Requirements and Specification for Multi-Core SW Synthesis", Technical Report TR-08-16, CECS, UC Irvine, 12/2008.
N. Teimouri, H. Tabkhi and G. Schirner, "Revisiting Accelerator-Based CMPs: Challenges and Solutions", Design Automation Conference (DAC), San Francisco, Design Automation Conference (DAC), 06/2015, In Press.
J. Zhang, S. Tang and G. Schirner, "Reducing Dynamic Dispatch Overhead (DDO) of SLDL-Synthesized Embedded Software", Asia and South Pacific Design Automation Conference (ASPDAC), Chiba/Tokyo, Japan, 2015.

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