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G. Schirner and R. Dömer, "Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling", In Proceedings of Design Automation and Test in Europe (DATE), Munich, Germany, 03, 2008.
J. Zhang, "Integration of Algorithm-Level Design and System-Level Design: Synthesis, Optimization and Exploration", Electrical and Computer Engineering, Boston, Massachusetts, Northeastern University, 08/2014.
G. Schirner, "The Integration of Algorithm Development Into System Level Design", Mathworks, Natick, MA, 04/09/12, 2012.
A. Agarwal, "Integrating Instruction Set Simulator into a System Level Design Environment", Electrical and Computer Engineering, vol/lev. MSc, Boston, Northeastern , 02/2013.
N. Teimouri, H. Tabkhi and G. Schirner, Improving Scalability of CMPs with Dense ACCs Coverage , Dresden, Germany, DATE, 2016.
N. Teimouri, "Improving Scalability of Chip-MultiProcessors with Many HW ACCelerators", Electrical and Computer Engineering, Boston, Northeastern University, 12/2017.
G. Schirner, "Improving Accuracy of Transaction Level Models in Multi-Processor System-on-Chip Design", Embedded System Design , University of Dortmund, Germany, 12/2007.
J. Zhang, Y. Zhang and M. L. Wang, "The Improvement of Accuracy of Standalone GPS with an Alternative Positioning Algorithm", SPIE Smart Structures and Materials+ Nondestructive Evaluation and Health Monitoring, International Society for Optics and Photonics, 2011.

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