Analysis and Optimization of Transaction Level Models for Multi-Processor System-on-Chip Design
The increasing complexity of modern embedded systems and systems-on-chip poses great challenges to the design process. An exploding number of alternatives has to be considered during the design process. Additionally, the amount of software with tight coupling to underlying hardware increases in current designs, adding another complexity dimension. System-Level Design addresses these challenges by using a unified approach for hardware and software design. Raising the level of abstraction, system-level design uses fewer, abstract models of hardware and software for system analysis, exploration, simulation, and implementation. Well-defined and efficient models are crucial for reliable design space exploration. In particular, fast yet accurate models are needed to reduce the design time and improve the end product. In this dissertation, we address the modeling of Multi-Processor System-on-Chip (MPSoC) with Transaction Level Models (TLM) for two essential system elements, communication busses and software processors.
We contribute in three aspects. First, we systematically analyze communication models and quantify the speed/accuracy trade-off in TLM. We provide a classification of abstraction
levels based on model granularity. In traditional models, each abstraction level improves the simulation speed by several orders of magnitude, however at a significant
loss of accuracy. Second, we propose a novel modeling technique, Result Oriented Modeling (ROM), which removes the inaccuracy drawback of TLM, yet yields nearly the same
speed. Third, we propose a fast alternative to traditional instruction set simulation, using a versatile processor model that shows speed gains of three orders of magnitude with only a
few percent of error in accuracy.
Overall, our work guides the system developer in choosing the proper model features and provides efficient techniques to model them. It also supports the designer in model selection, analysis and implementation. As a result, our system modeling research will influence the design of digital embedded systems, resulting in better and less expensive end products while reducing the time-to-market.
Electrical Engineering and Computer ScienceUniversity of California, Irvine