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Modeling, Simulation and Synthesis in an Embedded Software Design Flow for an ARM Processor

System level design is one approach to tackle the complexity of designing a modern System-on-Chip. One major aspect is the capability of developing the system model irrespectable of the later occurring hardware software split, with the goal to develop both hardware and software seamlessly at the same time and to merge the traditionally separated development ows.
Hardware/software co-simulation is needed for an efciently integrated design ow. Depending on the design phase, this co-simulation can be performed at different levels of abstraction. Early in the design phase, a a very
abstract simulation at the unpartitioned specication level yields fast functional results. On the other end, the cycle accurate simulation of RTL hardware and instruction set simulated software allows an accurate insight to
the nal system performance. This report focuses on the software perspective of a co-design/co-simulation environment. In form of a case study, we address three major tasks necessary to build an integrated embedded software design ow: modeling
of a processor core (including an instruction set simulator), porting of a RTOS to the selected processor core, and the embedded software generation that includes RTOS targeting of the generated code.
In particular, we have modeled a popular ARM core, the ARM7TDMI, at an abstract level, as well as on a cycle-accurate level using SWARM, an Instruction Set Simulator (ISS) for the ARM core. Furthermore, we
have ported MicroC/OS-II, a Real-Time Operating System (RTOS), to run on top of the SWARM ISS. Finally, we implemented a software generation tool. It automatically synthesizes C code, targeted to the selected Real-Time
Operating System (RTOS), from the rened design captured in the a system level design language. We demonstrate our embedded software development ow by use of an automotive application. An example of
anti-lock breaks uses a distributed architecture of sensors and actuators connected via a Controller Area Network (CAN). We undergo all steps of the design ow starting with the capturing of the specication model, down to
validation of the implementation with an ISS based co-simulation. Our results show that the co-design/cosimulation environment is feasible. All rened models, including the ISS based cycle-accurate model, show a
functional correct behavior.

Appeared in:
TR 06-06CECS, UC Irvine

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