You are here

Algorithm and Architecture Co-Design of Mixture of Gaussian (MoG) Background Subtraction for Embedded Vision Processor

Embedded vision is a rapidly growing and challenging market that demands high computation with low power consumption. Carefully crafted heterogeneous platforms have the possibility to deliver the required computation within the power budget. However, to achieve efficient realizations, vision algorithms and architectures have to be developed and tuned in conjunction. This article describes the algorithm / architecture co-design opportunities of a Mixture of Gaussian (MoG) implementation for realizing background subtraction. Particularly challenging is the memory bandwidth required for storing the background model (Gaussian parameters). Through joint algorithm tuning and system-level exploration, we develop a compression of Gaussian parameters which allows navigating the bandwidth/quality trade-off. We identify an efficient solution point in which the compression reduces the required memory bandwidth by 63% with limited loss in quality. Subsequently, we propose a HW-based architecture for MoG that includes sufficient flexibility toadjust to scene complexity.

Appeared in:
Proceedings of the Asilomar Conference on Signals, Systems, and Computers (AsilomarSSC)
Related Research:  Novel Architecture for Streaming Applications

Theme by Danetsoft and Danang Probo Sayekti inspired by Maksimer