• SCE based DSE framework using GA

  

  In this project, a DSE framework is proposed for heterogeneous platform allocation, task mapping and scheduling using domain specific multi-objective genetic algorithm. Our DSE model does not only contain the computation and communication of applications but also the topology of the heterogeneous platform.

• Network on Chip

  

  In this project, one hierarchy of abstract models of NoC is presented to overcome the tradeoff between simulation accuracy and speed in different levels. In this project, one hierarchy of abstract models of NoC is presented to overcome the tradeoff between simulation accuracy and speed in different levels. In continue, the effects of accuracy and the factors which influence on accuracy are investigated.

• Fidelity Estimation Navigator

  

  This project focuses on performance estimation of embedded systems and aims at finding the relation between actual execution metrics and data collected through profiling the source code of the applications. The extracted relation is used to define a model for performance estimation of other application.

• Hardware - Software Co-Design Using Simulink

  

  This project introduces a Simulink-based synthesis enabling hardware/software co-design from the algorithm level. It provides automatic synthesis which establishes the necessary synchronization and communication using underlying communication infrastructure.

• Algo2Spec: Integrating Algorithm Development and System-level Design

  

  This project bridges algorithm and system design environments to create a unified design flow facilitating algorithm and system co-design in order to decrease the gap between algorithm development and design environment. The goal is empowering the designer to combine analysis results across environments, apply cross layer optimizations, which will yield an overall optimized design through rapid design iterations.

Finished

• Embedded Software Development in a System Level Design Context

  

  In this project software execution environment is abstractly modeled and at the same time, all embedded softwares are created out of an abstract system model to provide better integration between hardware and software parts of system.

• Result Oriented Modeling

  

  This project introduces ROM, as an optimistic prediction approach which assumes that an application only needs to observe the timing at a transaction boundary and predicts the system status in the future, then checks for disturbing influences and updates the prediction. ROM can eliminate the inaccuracies for TLM in many cases, yet it is able to retain the TLM speed advantage.

• Fast and Accurate Transaction-Level Modeling

  

  This project introduces Transaction Level Modeling as a means of increasing the simulation performance/speed, this higher speed-up is gained by abstracting away communication details at the cost of accuracy. The goals of this research are identification of appropriate performance and accuracy properties for communication models, definition and statistical analysis of accuracy measurements, development and definition of modeling styles that yield high execution speed yet maintain required accuracy and demonstration of benefits using industry bus standards.